ASTFIN

Finally, I got some time to share my experience with software on our BRI Appliance.
As I wrote in my previous post, the u-boot worked on the first attempt. This was very exciting as it validated that most critical components were functioning properly:

Ahead of time, Pawel already prepared BR4-Appliance board definition in Astfin/uClinux-dist. I quickly compiled an image and loaded it using tftp


br4>setenv serverip 192.168.10.5
br4>setenv ipaddr 192.168.10.15
br4>setenv gatewayip 192.168.1.10
br4>tftp 0x2000000 uImage-br4
br4>bootm 0x2000000


After few intense moments I got a unix prompt :). Good job Pawel!!!

Welcome to:
____ _ _
/ __| ||_| _ _
_ _| | | | _ ____ _ _ \ \/ /
| | | | | | || | _ \| | | | \ /
| |_| | |__| || | | | | |_| | / \
| ___\____|_||_|_| |_|\____|/_/\_\
|_| For further information see:
http://www.astfin.org/
http://blackfin.uclinux.org/
http://uCpbx.org
BusyBox v1.4.1 (2007-11-05 19:56:23 EST) Built-in shell (msh)
Enter 'help' for a list of built-in commands.

After reviewing “dmesg”, I quickly discovered a few small errors;

This wasn’t much, I was really glad. I looked at the config.linux-2.6.x and config.vendors for br4-appliance and made few mods to enable both flashes (changing their configs according to our design). The NTPd problem was related to IPv6, so I forced the IPv4 by specifying the -4 as an extra argument to ntpd. I also created a small patch to fix few other minor problems and to adjust the bus speed to 125MHz as well as to add support for SDRAM chips I was using.
I also noticed a strange sport clock issue (noise) which would diminish after connecting the oscilloscope probe (few pF). I decided to add 22pF between the RSCLK and GND.

The mISDN problems was more complicated…so, I decided to leave it for later.
At this point I was ready do load the image into the NAND flash and boot from there:

br4>nand erase clean
br4>nand erase
br4>tftp 0x2000000 uImage-br4
br4>nand write 0x2000000 0x0 $(filesize)

The u-boot’s environment variables were already set to use nand_flash as bootcmd.
I restarted the unit and as expected our image was properly read and executed from the NAND flash.


<5>Linux version 2.6.19.3-ADI-2007R1-svn (mark@astfin.org) (gcc version 4.1.1 (ADI 07R1)) #1 Sat Nov 10 14:52:04 EST 2007
<5>Warning: limiting memory to 43MB due to hardware anomaly 05000263
<6>Blackfin support (C) 2004-2006 Analog Devices, Inc.
<6>Compiled for ADSP-BF537 Rev. 0.2
<6>Blackfin uClinux support by http://blackfin.uclinux.org/
<6>Processor Speed: 500 MHz core clock and 125 Mhz System Clock
<6>Board Memory: 64MB
<6>Kernel Managed Memory: 64MB
----snip----
<5>Creating 1 MTD partitions on "RAM":
<5>0x00000000-0x01400000 : "ROMfs"
<4>uclinux[mtd]: set ROMfs:EXT2 to be root filesystem
<6>NAND device: Manufacturer ID: 0×2c, Chip ID: 0xda (Unknown NAND 256MiB 3,3V 8-bit)
<6>Scanning device for bad blocks
<4>Bad eraseblock 846 at 0×069c0000
<4>Bad eraseblock 893 at 0×06fa0000
<4>Bad eraseblock 1491 at 0×0ba60000
<5>Creating 2 MTD partitions on “NAND 256MiB 3,3V 8-bit”:
<5>0×00000000-0×00800000 : “linux kernel”
<5>0×00800000-0×10000000 : “file system”
<6>m25p80 spi1.1: m25p64 (8192 Kbytes)
<5>Creating 3 MTD partitions on “m25p80″:
<5>0×00000000-0×00020000 : “bootloader”
<5>0×00020000-0×00100000 : “kernel”
<5>0×00100000-0×00800000 : “file system”
—-snip—-
<1>BFSI TLG Driver ($Id: bfsi_tlg.c 85 2007-05-17 15:35:41Z diego $)
<4>iRxBuffer1 = 0xff803e58 - size 2 * 8 * 8 = 64B
<4>iTxBuffer1 = 0xff803ed8 - size 2 * 8 * 8 = 64B
<4>ISR installed OK
<6>Modular ISDN Stack core version () revision ($Revision: 1.40 $)
<7>mISDNd: kernel daemon started (current:00295040)
<7>mISDNd: test event done
<6>mISDN_dsp: Audio DSP Rev. 1.30 (debug=0×0) dtmfthreshold(100)
<6>mISDN_dsp: DSP clocks every 64 samples. This equals 2 jiffies.
<7>dsp_pipeline_module_init: dsp pipeline module initialized
<7>mISDN_dsp_element_register: hwec registered
<6>ISDN L1 driver version 1.20
<6>ISDN L2 driver version 1.32
<6>mISDN: DSS1 Rev. 1.47
<6>XHFC: xhfc_init driver Rev. ??? (debug=0)
<4>xhfc_spi_probe: entered
<4>SPI CS bit: 5 enabled
<4>toggle reset
<4>set reset to PF14
<6>spi_xhfc_count: Found XHFC-4SU @ SPI address 0
<7>spi_xhfc_count: Unrecognized chip ID 0xff @ SPI address 1
<6>xhfc_spi_probe: 1 device found
<6> xhfc_spi_probe: xhfc[0].pcm_config = 0xd000000
<7>spi_xhfc_isdevice: Identified XHFC device 0×63 at SPI address 0×0
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(0) port(0) slot_rx(0) slot_tx(0)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(1) port(0) slot_rx(1) slot_tx(1)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(4) port(1) slot_rx(2) slot_tx(2)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(5) port(1) slot_rx(3) slot_tx(3)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(8) port(2) slot_rx(4) slot_tx(4)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(9) port(2) slot_rx(5) slot_tx(5)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(12) port(3) slot_rx(6) slot_tx(6)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(13) port(3) slot_rx(7) slot_tx(7)
<6>XHFC_PI0 xhfc_spi_probe: adapter(0) ‘XHFC:SPI’ found on SPI bus
<6>XHFC: 1 card installed
root:~>


Now, it was time for the mISDN package. The mISDN was ported to Blackfin by Diego Serafin (thanks Diego) and incorporated into Astfin by Pawel (thanks Pawel). The package contains several kernel based modules and few libraries for user space applications (such as chan_misdn). With Pawel’s help I was quickly able to adapt Diego’s code to our hardware and very soon we could see our driver detecting the ISDN chip:

spi_xhfc_count: Found XHFC-4SU @ SPI address 0
xhfc_spi_probe: 1 device found
The PCM bus however, wasn’t working properly…
I looked at modifications to the sport0/bf537 section of the bfsi_su.c code originally developed by David and then adapted for mISDN by Diego and I found 2 small problems. Since most people use Sport1 on the Stamp board, no one probably really tested sport0 support. But fixing it still was not enough…
The next day, Dimitar found another issue, that same afternoon Mathieu contributed by finding yet another problem. After talking to Diego, we also decided to make small hardware mod to use more sophisticated frame sync than f0IO.
We made huge progress and at this point we were able fully load the kernel and the user space components of mISDN.

<6>Modular ISDN Stack core version () revision ($Revision: 1.40 $)
<7>mISDNd: kernel daemon started (current:00259580)
<7>mISDNd: test event done
<6>ISDN L1 driver version 1.20
<6>ISDN L2 driver version 1.32
<6>mISDN: DSS1 Rev. 1.47
<1>BFSI TLG Driver ($Id: bfsi_tlg.c 85 2007-05-17 15:35:41Z diego $)
<4>iRxBuffer1 = 0xff900320 - size 2 * 8 * 32 = 256B
<4>iTxBuffer1 = 0xff900520 - size 2 * 8 * 32 = 256B
<6>DMA3/DMA4 enabled
<6>SPORT0 enabled
<4>ISR installed OK
<6>XHFC: xhfc_init driver Rev. ??? (debug=65535)
<4>xhfc_spi_probe: entered
<4>SPI CS bit: 5 enabled
<4>toggle reset
<4>set reset to PF14
<6>spi_xhfc_count: Found XHFC-4SU @ SPI address 0
<7>spi_xhfc_count: Unrecognized chip ID 0xff @ SPI address 1
<6>xhfc_spi_probe: 1 device found
<6> xhfc_spi_probe: Registered to BFSI IRQ 0x0
<6> xhfc_spi_probe: xhfc[0].pcm_config = 0xd000000
<7>spi_xhfc_isdevice: Identified XHFC device 0×63 at SPI address 0×0
<6>XHFC-4SU_PI0_0 ChipID: 0×63
<6>xhfc_pcm_init XHFC-4SU_PI0_0: Setting up PCM audio over TDM: pcm_config=0xd000000
<4>TDM Bus mode: MASTER
<4>TDM Bit rate: 2 Mbit/s
<4>C2I clock input:OFF
<4>C2O clock output:ON
<4>C4POL: F0IO sampled on NEG clock transition
<4>F0IO signal is ACTIVE LOW
<4>ISDN Sync port: AUTO
<4>SYNC_I is ENABLED
<6>xhfc_pcm_init: Setting TDM master speed = 0
<6>xhfc_pcm_init: Setting TDM clock: C2I=OFF, C2O=ON
<6>xhfc_pcm_init: Setting SU sync=AUTO
<6>XHFC-4SU_PI0_0 enable_interrupts
<6>XHFC-4SU_PI0_0 enable_dma
<6>XHFC-4SU_PI0_0 disable_interrupts
<6>XHFC-4SU_PI0_0 disable_dma
<4>XHFC-4SU_PI0_0 parse_module_params: protocol[0]=0×2002, dpid=2, mode:TE,S0 , Loops:0×0
<4>XHFC-4SU_PI0_0 parse_module_params: protocol[1]=0×02, dpid=2, mode:TE,S0 , Loops:0×0
<4>XHFC-4SU_PI0_0 parse_module_params: protocol[2]=0×02, dpid=2, mode:TE,S0 , Loops:0×0
<4>XHFC-4SU_PI0_0 parse_module_params: protocol[3]=0×02, dpid=2, mode:TE,S0 , Loops:0×0
<6>XHFC-4SU_PI0_0 init_su port(0)
<6>XHFC-4SU_PI0_0 init_su su_ctrl0(0×40) su_ctrl1(0×00) su_ctrl2(0×00) st_ctrl3(0xf8)
<6>XHFC-4SU_PI0_0 init_su port(1)
<6>XHFC-4SU_PI0_0 init_su su_ctrl0(0×40) su_ctrl1(0×00) su_ctrl2(0×00) st_ctrl3(0xf8)
<6>XHFC-4SU_PI0_0 init_su port(2)
<6>XHFC-4SU_PI0_0 init_su su_ctrl0(0×40) su_ctrl1(0×00) su_ctrl2(0×00) st_ctrl3(0xf8)
<6>XHFC-4SU_PI0_0 init_su port(3)
<6>XHFC-4SU_PI0_0 init_su su_ctrl0(0×40) su_ctrl1(0×00) su_ctrl2(0×00) st_ctrl3(0xf8)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering D-channel, card(0) ch(2) port(0) protocol(2)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(0) port(0)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(0) port(0) slot_rx(0) slot_tx(0)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(1) port(0)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(1) port(0) slot_rx(1) slot_tx(1)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: registering Stack for Port 0
<7>XHFC-4SU_PI0_0_0_D channel(2) protocol(-1)
<7>XHFC-4SU_PI0_0_0_B1 channel(0) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_0_B1 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(0) bc(0)
<7>XHFC-4SU_PI0_0_0_B2 channel(1) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_0_B2 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(0) bc(1)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering D-channel, card(0) ch(6) port(1) protocol(2)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(4) port(1)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(4) port(1) slot_rx(2) slot_tx(2)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(5) port(1)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(5) port(1) slot_rx(3) slot_tx(3)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: registering Stack for Port 1
<7>XHFC-4SU_PI0_0_1_D channel(6) protocol(-1)
<7>XHFC-4SU_PI0_0_1_B1 channel(4) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_1_B1 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(1) bc(0)
<7>XHFC-4SU_PI0_0_1_B2 channel(5) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_1_B2 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(1) bc(1)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering D-channel, card(0) ch(10) port(2) protocol(2)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(8) port(2)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(8) port(2) slot_rx(4) slot_tx(4)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(9) port(2)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(9) port(2) slot_rx(5) slot_tx(5)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: registering Stack for Port 2
<7>XHFC-4SU_PI0_0_2_D channel(10) protocol(-1)
<7>XHFC-4SU_PI0_0_2_B1 channel(8) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_2_B1 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(2) bc(0)
<7>XHFC-4SU_PI0_0_2_B2 channel(9) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_2_B2 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(2) bc(1)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering D-channel, card(0) ch(14) port(3) protocol(2)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(12) port(3)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(12) port(3) slot_rx(6) slot_tx(6)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: Registering B-channel, card(0) ch(13) port(3)
<7>XHFC-4SU_PI0_0 xhfc_pcm_ts_setup: Registering B-channel timeslot, card(0) ch(13) port(3) slot_rx(7) slot_tx(7)
<6>XHFC-4SU_PI0_0 init_mISDN_channels: registering Stack for Port 3
<7>XHFC-4SU_PI0_0_3_D channel(14) protocol(-1)
<7>XHFC-4SU_PI0_0_3_B1 channel(12) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_3_B1 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(3) bc(0)
<7>XHFC-4SU_PI0_0_3_B2 channel(13) protocol 0–>ffffffff
<7>XHFC-4SU_PI0_0_3_B2 ISDN_PID_NONE
<6>XHFC-4SU_PI0_0 setup_su disable pt(3) bc(1)
<6>XHFC-4SU_PI0_0 enable_interrupts
<6>XHFC-4SU_PI0_0 enable_dma
<6>XHFC-4SU_PI0_0 enable_dma
<6>XHFC_PI0 xhfc_spi_probe: adapter(0) ‘XHFC:SPI’ found on SPI bus
<6>XHFC: 1 card installed
<6>su_new_state XHFC-4SU_PI0_0_0: TE F3
<6>su_new_state XHFC-4SU_PI0_0_1: TE F3
<6>su_new_state XHFC-4SU_PI0_0_2: TE F3
<6>su_new_state XHFC-4SU_PI0_0_3: TE F3


It was time to fire up chan_misnd….

BR4*CLI> Data access misaligned address violation
- Attempted misaligned data memory or data cache access.CURRENT PROCESS:COMM=asterisk PID=228
TEXT = 0x02000000-0x020a92bc DATA = 0x021402bc-0x0216ec58
BSS = 0x0216ec58-0x028e0000 USER-STACK = 0x028ffed0
----snip----
Hardware Trace:
0 Target : <0x00004580> { _trap_c + 0x0 }
Source : <0xffa00bd4> { _exception_to_level5 + 0xb4 }
1 Target : <0xffa00b20> { _exception_to_level5 + 0x0 }
Source : <0xffa00b1e> { _ex_trap_c + 0x5a }
2 Target : <0xffa00c4c> { _trap + 0x0 }
Source : <0x00d92a46> [ /usr/lib/asterisk/modules/chan_misdn.so + 0x12a46 ]
3 Target : <0×00d92a46> [ /usr/lib/asterisk/modules/chan_misdn.so + 0x12a46 ]
Source : <0×00d92a14> [ /usr/lib/asterisk/modules/chan_misdn.so + 0x12a14 ]
4 Target : <0×00d92a10> [ /usr/lib/asterisk/modules/chan_misdn.so + 0x12a10 ]
Source : <0×00dfa226> [ /usr/lib/libmISDN.so + 0x2226 ]
5 Target : <0×00dfa216> [ /usr/lib/libmISDN.so + 0x2216 ]
Source : <0×02195abe> [ /lib/libpthread-0.9.29.so + 0x5abe ]
6 Target : <0×02195ab8> [ /lib/libpthread-0.9.29.so + 0x5ab8 ]
Source : <0×02195a84> [ /lib/libpthread-0.9.29.so + 0x5a84 ]
7 Target : <0×02195a82> [ /lib/libpthread-0.9.29.so + 0x5a82 ]
Source : <0×02195ab4> [ /lib/libpthread-0.9.29.so + 0x5ab4 ]
8 Target : <0×02195ab4> [ /lib/libpthread-0.9.29.so + 0x5ab4 ]
Source : <0×02197592> [ /lib/libpthread-0.9.29.so + 0x7592 ]
9 Target : <0×02197586> [ /lib/libpthread-0.9.29.so + 0x7586 ]
Source : <0×0219751c> [ /lib/libpthread-0.9.29.so + 0x751c ]
—- snip —-
Disconnected from Asterisk server
Executing last minute cleanups
Asterisk cleanly ending (0).


Ooops, this is not what I was expecting…
The problem was definitely related to chan_misdn and related code.
As per Diego’s suggestion Dimitar and I used objdump to identify the offending sections of the code. After looking at our patches one more time we realized that modifications for chan_misdn and asterisk’s misdn libs were missing. We actually did not port it, and since it just compiled cleanly we forgot about it. It took us several long hours to adapt Diego’s patches for Asterisk 1.2 to Asterisk 1.4 and finally we were able to see chan_misdn loading properly.


misdn port block Blocks the given port
misdn port down Tries to deacivate the L1 on the given port
misdn port unblock Unblocks the given port
misdn port up Tries to establish L1 on the given port
misdn reload Reloads internal mISDN config, read from cfg-file
misdn restart pid Restarts the given pid
misdn restart port Restarts the given port
misdn send calldeflect Sends CallDeflection to mISDN Channel
misdn send digit Sends DTMF Digit to mISDN Channel
misdn send display Sends Text to mISDN Channel
misdn send restart Sends a restart for every bchannel on the given port
misdn set crypt debug Sets CryptDebuglevel of chan_misdn, at the moment, level={1,2}
misdn set debug Sets Debuglevel of chan_misdn
misdn set tics
misdn show channels Shows internal mISDN chan_list
misdn show channel Shows internal mISDN chan_list
misdn show config Shows internal mISDN config, read from cfg-file
misdn show ports stats Shows chan_misdns call statistics per port
misdn show port Shows detailed information for given port
misdn show stacks Shows internal mISDN stack_list
misdn toggle echocancel Toggles EchoCancel on mISDN ChannelBR4*CLI> misdn show config
Misdn General-Config:
-> debug: 0 -> tracefile: /var/log/asterisk/misdn.log
-> bridging: no -> stop_tone_after_first_digit: yes
-> append_digits2exten: yes -> dynamic_crypt: no
-> crypt_prefix: -> crypt_keys:
-> ntdebugflags: 0 -> ntdebugfile: /var/log/misdn-nt.log[PORT 1]
-> name: demo -> allowed_bearers: all
-> far_alerting: no -> rxgain: 0
-> txgain: 0 -> te_choose_channel: no
-> pmp_l1_check: no -> reject_cause: 21
-> block_on_alarm: no -> hdlc: no
-> context: misdn -> language: en
-> musicclass: default -> callerid:
-> method: standard -> dialplan: 0
-> localdialplan: 0 -> cpndialplan: 0
-> nationalprefix: 0 -> internationalprefix: 00
-> presentation: -1 -> screen: -1
-> always_immediate: no -> nodialtone: no
-> immediate: no -> senddtmf: no
-> hold_allowed: no -> early_bconnect: yes
-> incoming_early_audio: no -> echocancel: 0
-> pipeline: -> need_more_infos: no
-> noautorespond_on_setup: no -> nttimeout: no
-> bridging: yes -> jitterbuffer: 4000
-> jitterbuffer_upper_threshold: 0 -> callgroup:
-> pickupgroup: -> max_incoming: -1
-> max_outgoing: -1 -> l1watcher_timeout: 0
-> overlapdial: 0 -> msns: *
-> faxdetect: no -> faxdetect_context:
-> faxdetect_timeout: 5 -> ptp: yes

The next step was easy; I connected my Aurora Sonata ISDN tester and dialed a random number.
Since my misdn.conf was pointing to a demo section of extensions.conf (context)

[general]
debug=0
bridging=no[default]
;echocancel=128
;echotraining=500
context=default[demo]
ports=1,2,3,4
context=demo


and I dialed an invalid (random) number… Asterisk complained about it verbally
Almost first call
I quickly modified my Asterisk’s configurations and than I dialed Dimitar’s extension…it worked!!!!
Exactly one month after committing the final changes to the PCB (October 10th 2007) layout we have established the first ISDN call using Open Source Hardware and Software platform This is amazing team achievement and I would like to thank once again, all those that have contributed.

There are still many tasks to be done;

Stay tuned,

Mark